There is a significant market for power amplifier transistors for use in cellular base stations. In this application area the overall efficiency of the transistor is one of the most important discriminating factors in the market. Power amplifier transistors have to be able to withstand relatively high voltages (several tens of volts). Consequently, often discrete RF lateral double-diffused metal-oxide-semiconductor (LDMOS) transistors are used.
In a known discrete RF-LDMOS power amplifier transistor, the actual transistor is located on a silicon die. The package further includes a matching network comprising bondwires and a few discrete capacitors. A typical silicon die comprises a transistor having about 100 transistor fingers in parallel in order to obtain a large transistor width versus length (W/L) ratio. A transistor finger is here defined as a unit of 1 active region with one (shared) gate line and one (shared) drain line, such that the following expression applies for the total transistor width: Wtot=Wfinger*Nfinger, wherein Wtot is the total transistor width, Wfinger is the total finger width, and Nfinger is the total number of transistor fingers. The transistor is connected through about 10 gate bondpads and about 20 drain bondpads. The source of the transistor is connected through a fairly low-resistivity (i.e. 10 mΩ·cm) substrate.
A problem with the known LDMOST power amplifier transistors is that their efficiency is still not optimal, in particular for high operating frequencies.